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Artificial Intelligence BSc (Hons) - COMP35112 Chip Multiprocessors
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2.1.1 Knowledge and understanding of facts, concepts, principles & theories
Lectures on these topics: how to construct a parallel computer, shared memory vs. distributed memory; how to program a parallel computer, data sharing vs. message passing (vs. functional programming); multithreading; cache coherence; synchronisation mechanisms; hardware support for synchronisation; lock-free data structures; OpenMP/MPI; thread-level speculation; transactional memory; memory consistency; attached accelerators and their programming; functional programming and dataflow.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
2.1.2 Use of such knowledge in modelling and design
This is investigated in the lab work. There are 3 exercises, each of which requires students to develop a multithreaded parallel data sharing program in Java to perform a given task (vector addition, sorting, partial differential equations solving). The focus is on measuring the resulting performance and demonstrating at least some degree of speedup. Trade-offs are inherent in this.
Assesement : Lab work
Assesement : Lab work
2.1.3 Problem solving strategies
Investigated in the lab work.
Assesement : Lab work
Assesement : Lab work
2.1.4 Analyse if/how a system meets current and future requirements
In the lectures we cover how some design points of multiprocessors (such as cache coherency) do not scale well with the increase in cores expected in future processors.
Assesement : Examination
Assesement : Examination
2.1.5 Deploy theory in design, implementation and evaluation of systems
Concepts from the lectures are applied in the lab exercises in which the students are asked to design, implement, and evaluate parallel shared-memory programs.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
2.1.7 Knowledge and understanding of commercial and economic issues
Lectures are explicit about the lack of accurate information about how commercial cache protocols and related hardware-level schemes actually work due to the commercial sensitivities.
Assesement : Examination
Assesement : Examination
2.2.1 Specify, design or construct computer-based systems
Lectures describe many important details of the construction of multiprocessors.
Assesement : Examination
Assesement : Examination
2.2.2 Evaluate systems in terms of quality and trade-offs
Some lecture topics go into these issues. For example, early attempts to provide synchronisation instructions require a read-modify-write directly into memory, but modern pipelined processors cannot do this efficiently, so novel schemes have had to be invented.
Assesement : Examination
Assesement : Examination
2.2.3 Recognise risk/safety for safe operation of computing equipment
Lectures emphasise the importance of correct behaviour/implementation in data protection. The incorrect implementation of Transactional Memory extensions for the i86 ISA in Intel's Haskell processor is specifically mentioned.
Assesement : Examination
Assesement : Examination
2.3.2 Development of general transferable skills
Mainly by the problem-solving nature of the lab exercises and some parts of exam questions.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
3.1.3 Knowledge of systems architecture
Inherent in the nature of the material covered. The course unit is part of the School's Architecture Theme.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
3.2.3 System Design
Design of parallel systems.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
4.1.1 Knowledge and understanding of scientific and engineering principles
Inherent in the lab work.
Assesement : Examination, Lab work
Assesement : Examination, Lab work
4.2.3 Principles of appropriate supporting engineering and scientific disciplines
Draws on prior course units that cover the basic engineering of computer hardware and architecture.
Assesement : Examination
Assesement : Examination